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[/] - Rev 89

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  • Rev 89 2015-04-11 19:19:46 GMT
  • Author: csantifort
  • Log message:
    CHange registered outputs with non-zero initial values to wires with an internal register.
    This works around an issue with Altera (Quartus) synthesis where any port registers are given an initial vale of zero.
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[FOLDER] amber/ 89  3518d 00h csantifort View Log RSS feed

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