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Last modification

  • Rev 2 2008-04-08 20:08:11 GMT
  • Author: fpga_is_funny
  • Log message:
    First Revision
    After the successfully functional test with a SoC of an APPLE][+, I corrected the wrong CVS log entry "$log$" to "$Log$" into all VHDL files. I hope this will not have a bad impact for cpu6502_tc...smile
    The CVS history in the VHDL files is fine now.
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