OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] - Rev 124

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 124 2011-11-02 15:27:24 GMT
  • Author: rfajardo
  • Log message:
    Removing Verilog delays from minsoc_bench.v. minsoc_bench_defines.v defines now if uart or ethernet have to be tested. If yes, it checks the behavior of the enclosed firmwares. If not, simulation simply runs forever.
Path Last modification Log RSS feed
[FOLDER] minsoc/ 124  3245d 00h rfajardo View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.