OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [doc/] - Rev 17

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 17 2009-11-17 14:38:49 GMT
  • Author: rfajardo
  • Log message:
    Ethernet testbench speed penalty solved. Now Ethernet of testbench and minsoc can be enabled by only uncommenting `define ETHERNET on minsoc_defines.v.

    send_mac, get_mac and uart_send tasks have been included/improved. Also a testbench, which works for both included firmwares is added. (eth and uart)

    If ETHERNET is defined for the SoC, both firmwares will complete successfully. If not, the eth firmware will stall when trying to access the Ethernet module.
Path Last modification Log RSS feed
[FOLDER] minsoc/ 17  5443d 20h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 1  5504d 00h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5504d 00h root View Log RSS feed
[NODE][FOLDER] trunk/ 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 15  5449d 17h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][NODE][DB-FILE] lgpl-3.0.txt 2  5503d 23h rfajardo View Log RSS feed
[NODE][NODE][NODE][FILE] minsoc.odt 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][NODE][FILE] minsoc.pdf 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 17  5443d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 11  5468d 20h rfajardo View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.