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[/] [minsoc/] [trunk/] [prj/] - Rev 108

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Last modification

  • Rev 108 2011-10-26 16:48:51 GMT
  • Author: rfajardo
  • Log message:
    Scripts updates to correct paths when working under Windows. Now, ModelSim, Xilinx and Altera synthesis are working on Windows through batch files.

    Icarus Verilog and Altera synthesis are working as well. Job done!
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[NODE][FOLDER] trunk/ 108  3291d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 105  3292d 03h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 71  3461d 02h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 101  3327d 05h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] prj/ 108  3291d 20h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera/ 97  3336d 04h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] scripts/ 108  3291d 20h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 97  3336d 04h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] src/ 96  3336d 15h javieralso View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx/ 97  3336d 04h rfajardo View Log RSS feed
[NODE][NODE][NODE][FILE] Makefile 104  3299d 02h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 88  3341d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 104  3299d 02h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 80  3360d 02h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] syn/ 107  3291d 23h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] utils/ 106  3292d 02h rfajardo View Log RSS feed

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