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[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] - Rev 13

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Last modification

  • Rev 12 2012-11-18 23:46:56 GMT
  • Author: ayersg
  • Log message:
    Updated SoC bit file with hardware divider. Changed SoC frequency to a more conservative 33/66MHz clock. SoC BRAM cores must now be generated by the user. Added a README to the standalone processor directory.
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[FOLDER] mips32r1/ 13  3780d 11h ayersg View Log RSS feed
[NODE][FOLDER] branches/ 1  4225d 05h root View Log RSS feed
[NODE][FOLDER] tags/ 1  4225d 05h root View Log RSS feed
[NODE][FOLDER] trunk/ 13  3780d 11h ayersg View Log RSS feed
[NODE][NODE][FOLDER] Documentation/ 7  4206d 13h ayersg View Log RSS feed
[NODE][NODE][FOLDER] Hardware/ 12  4189d 12h ayersg View Log RSS feed
[NODE][NODE][NODE][FOLDER] MIPS32_Standalone/ 12  4189d 12h ayersg View Log RSS feed
[NODE][NODE][NODE][FOLDER] XUPV5-LX110T_SoC/ 12  4189d 12h ayersg View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] MIPS32-Pipelined-Hw/ 12  4189d 12h ayersg View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] HOWTO 12  4189d 12h ayersg View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] MIPS32-Pipelined-Hw.bit 12  4189d 12h ayersg View Log RSS feed
[NODE][NODE][FOLDER] Software/ 2  4224d 05h ayersg View Log RSS feed

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