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[/] [mod_sim_exp/] - Rev 71

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Last modification

  • Rev 71 2013-03-06 15:27:23 GMT
  • Author: JonasDC
  • Log message:
    added synthesis report for altera and xilinx for the new ram.
    added coregen sources for xilinx for primitive RAM
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[FOLDER] mod_sim_exp/ 71  3560d 20h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 68  3560d 22h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 49  3587d 17h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 71  3560d 20h JonasDC View Log RSS feed

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