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[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] - Rev 37
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Last modification
- Rev 37 2012-11-08 18:46:15 GMT
- Author: JonasDC
- Log message:
- changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths
and new systolic pipeline now supports split or single pipeline