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https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk
Subversion Repositories mod_sim_exp
[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] - Rev 66
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Last modification
- Rev 66 2013-03-06 12:05:05 GMT
- Author: JonasDC
- Log message:
- added asymmetric ram structures to support a more performant ramstyle.
defined for xilinx and altera, not tested with other tools.