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Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] - Rev 69

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Last modification

  • Rev 69 2013-03-06 15:19:04 GMT
  • Author: JonasDC
  • Log message:
    big update, the mod_sim_exp core now has a selectable ram structure. a generic ram that should be usable in any fpga, a asymmetric ram that is usable for some devices of altera or xilinx and uses less resources.
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 69  3557d 22h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 68  3558d 00h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 49  3584d 18h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 69  3557d 22h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 46  3652d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 47  3652d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 69  3557d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] vhdl/ 69  3557d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] core/ 69  3557d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] interface/ 65  3565d 17h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] ram/ 66  3558d 01h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 65  3565d 17h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  3677d 17h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] syn/ 64  3565d 22h JonasDC View Log RSS feed

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