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[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 59

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Last modification

  • Rev 59 2013-02-23 21:15:49 GMT
  • Author: JonasDC
  • Log message:
    added templates that correctly infer RAM, for dual port en true dual port RAM
    added general functions file, (used in the two RAM templates)
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 59  4160d 01h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 58  4163d 01h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 49  4176d 04h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 59  4160d 01h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 46  4244d 08h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 47  4244d 08h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 59  4160d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] vhdl/ 59  4160d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] core/ 59  4160d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] adder_block.vhd 12  4283d 04h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] autorun_cntrl.vhd 39  4263d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] cell_1b.vhd 14  4283d 04h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] cell_1b_adder.vhd 9  4283d 09h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] cell_1b_mux.vhd 9  4283d 09h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] counter_sync.vhd 39  4263d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] d_flip_flop.vhd 4  4283d 13h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] fifo_generic.vhd 55  4164d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] fifo_primitive.vhd 3  4284d 03h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] modulus_ram.vhd 3  4284d 03h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mod_sim_exp_core.vhd 45  4244d 08h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mod_sim_exp_pkg.vhd 45  4244d 08h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mont_ctrl.vhd 39  4263d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] mont_multiplier.vhd 37  4267d 04h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operands_sp.vhd 3  4284d 03h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operand_dp.vhd 3  4284d 03h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operand_mem.vhd 39  4263d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] operand_ram.vhd 39  4263d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] register_1b.vhd 6  4283d 12h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] register_n.vhd 15  4283d 03h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] standard_cell_block.vhd 17  4282d 14h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] std_functions.vhd 59  4160d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] stepping_logic.vhd 19  4281d 09h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] sys_first_cell_logic.vhd 31  4268d 12h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] sys_last_cell_logic.vhd 39  4263d 01h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] sys_pipeline.vhd 37  4267d 04h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] sys_stage.vhd 25  4269d 03h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] x_shift_reg.vhd 21  4276d 14h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] interface/ 45  4244d 08h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] ram/ 59  4160d 01h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 41  4254d 10h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  4269d 02h JonasDC View Log RSS feed

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