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https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk
Subversion Repositories mod_sim_exp
[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 69
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Last modification
- Rev 69 2013-03-06 15:19:04 GMT
- Author: JonasDC
- Log message:
- big update, the mod_sim_exp core now has a selectable ram structure. a generic ram that should be usable in any fpga, a asymmetric ram that is usable for some devices of altera or xilinx and uses less resources.