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[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [ram/] - Rev 59

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Last modification

  • Rev 59 2013-02-23 21:15:49 GMT
  • Author: JonasDC
  • Log message:
    added templates that correctly infer RAM, for dual port en true dual port RAM
    added general functions file, (used in the two RAM templates)
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 59  4071d 22h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 58  4074d 22h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 49  4088d 01h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 46  4156d 05h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 47  4156d 05h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] vhdl/ 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] core/ 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] interface/ 45  4156d 05h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] ram/ 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] dpram_altera.vhd 53  4076d 04h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] dpram_generic.vhd 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] dpram_xilinx.vhd 52  4076d 05h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] tdpram_generic.vhd 59  4071d 22h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] tdpram_xilinx.vhd 51  4076d 06h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 41  4166d 07h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  4180d 23h JonasDC View Log RSS feed

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