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[/] [mod_sim_exp/] [trunk/] [syn/] - Rev 71

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Last modification

  • Rev 71 2013-03-06 15:27:23 GMT
  • Author: JonasDC
  • Log message:
    added synthesis report for altera and xilinx for the new ram.
    added coregen sources for xilinx for primitive RAM
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 71  4056d 20h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 68  4056d 22h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 49  4083d 17h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 71  4056d 20h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 70  4056d 20h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 47  4151d 21h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 69  4056d 20h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 70  4056d 20h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  4176d 15h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] syn/ 71  4056d 20h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera/ 71  4056d 20h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx/ 71  4056d 20h JonasDC View Log RSS feed

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