URL
https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk
Subversion Repositories mod_sim_exp
[/] [mod_sim_exp/] [trunk/] [syn/] [altera/] [log/] [mod_sim_exp_core/] - Rev 104
Last modification
- Rev 71 2013-03-06 15:27:23 GMT
- Author: JonasDC
- Log message:
- added synthesis report for altera and xilinx for the new ram.
added coregen sources for xilinx for primitive RAM