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https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
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[/] [openmsp430/] [trunk/] [core/] [bench/] [verilog/] - Rev 103
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Last modification
- Rev 103 2011-03-05 14:44:48 GMT
- Author: olivier.girard
- Log message:
- Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL.