URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] - Rev 477
Go to most recent revision | Changes | View Log | RSS feed
Last modification
- Rev 477 2011-01-15 05:48:25 GMT
- Author: julius
- Log message:
- ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.