OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 67

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 67 2010-02-16 08:58:52 GMT
  • Author: julius
  • Log message:
    New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory
Path Last modification Log RSS feed
[FOLDER] openrisc/ 67  5397d 22h julius View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.