OpenCores
URL https://opencores.org/ocsvn/uart2bus/uart2bus/trunk

Subversion Repositories uart2bus

[/] [uart2bus/] [trunk/] [verilog/] [sim/] - Rev 14

Rev

Changes | View Log | RSS feed

Last modification

  • Rev 4 2010-04-02 19:54:36 GMT
  • Author: motilito
  • Log message:
    Corrected some problems in the binary mode protocol test bench.
    Updated documentation.
Path Last modification Log RSS feed
[FOLDER] uart2bus/ 14  2658d 19h motilito View Log RSS feed
[NODE][FOLDER] branches/ 1  5191d 04h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5191d 04h root View Log RSS feed
[NODE][FOLDER] trunk/ 14  2658d 19h motilito View Log RSS feed
[NODE][NODE][FOLDER] doc/ 12  4448d 12h motilito View Log RSS feed
[NODE][NODE][FOLDER] scilab/ 7  4786d 02h motilito View Log RSS feed
[NODE][NODE][FOLDER] verilog/ 12  4448d 12h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 12  4448d 12h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 12  4448d 12h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 4  5142d 03h motilito View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] icarus/ 4  5142d 03h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] syn/ 2  5188d 11h motilito View Log RSS feed
[NODE][NODE][FOLDER] vhdl/ 13  2992d 09h smuller View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.