URL
https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk
Subversion Repositories virtex7_pcie_dma
[/] - Rev 7
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Last modification
- Rev 7 2015-01-28 12:52:12 GMT
- Author: fransschreuder
- Log message:
- Changed:
* Simplified address calculation to relax timing
* Changed slow register clock from 40 MHz to 250/6=41.667MHz to relax timing
* Omit need of external clock crystal on the board (all clocks are now derived from the 100MHz pcie refclk
* Added support for the High tech Global HTG710 board