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[/] [zipcpu/] [trunk/] [rtl/] [core/] - Rev 30

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  • Rev 30 2015-08-22 10:51:30 GMT
  • Author: dgisselq
  • Log message:
    Here's a 20% increase in performance: We've gone from 0.44 clocks per
    instruction up to 0.53 clocks per instruction on the test.S testset. The
    cost? Oh, only about 300 slices.

    Not bad.

    The specification document will also soon be updated with a list of
    conditions that create stalls, as eliminating stalls was how I managed to get
    the performance up like I did.
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[NODE][NODE][FOLDER] doc/ 24  3559d 17h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 30  3556d 17h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] aux/ 15  3566d 16h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] core/ 30  3556d 17h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] cpuops.v 25  3557d 03h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] memops.v 3  3582d 13h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] pipefetch.v 18  3563d 03h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] prefetch.v 2  3583d 07h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] zipcpu.v 30  3556d 17h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] peripherals/ 9  3582d 06h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  3557d 02h dgisselq View Log RSS feed

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