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[/] [zipcpu/] [trunk/] [rtl/] [core/] - Rev 30

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  • Rev 30 2015-08-22 10:51:30 GMT
  • Author: dgisselq
  • Log message:
    Here's a 20% increase in performance: We've gone from 0.44 clocks per
    instruction up to 0.53 clocks per instruction on the test.S testset. The
    cost? Oh, only about 300 slices.

    Not bad.

    The specification document will also soon be updated with a list of
    conditions that create stalls, as eliminating stalls was how I managed to get
    the performance up like I did.
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[NODE][NODE][FOLDER] doc/ 24  2510d 00h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 30  2507d 01h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] aux/ 15  2517d 00h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] core/ 30  2507d 01h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] cpuops.v 25  2507d 11h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] memops.v 3  2532d 21h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] pipefetch.v 18  2513d 11h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] prefetch.v 2  2533d 14h dgisselq View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] zipcpu.v 30  2507d 01h dgisselq View Log RSS feed
[NODE][NODE][NODE][FOLDER] peripherals/ 9  2532d 13h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  2507d 09h dgisselq View Log RSS feed

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