URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 41

Rev	Log message	Author	Age	Path
41	remove unused files	simont	8021d 10h	/
40	added sigals for interacting with external ram	simont	8041d 12h	/
39	added signals ack, stb and cyc	simont	8048d 10h	/
38	fix some bugs	simont	8048d 10h	/
37	added signals ack, stb and cyc	simont	8048d 10h	/
36	fix bugs in mode 0	simont	8048d 11h	/
35	design docunemt	simont	8049d 09h	/
34	specification docunemt	simont	8049d 09h	/
33	fix some bugs	simont	8049d 14h	/
32	overflow repaired	simont	8049d 15h	/
31	fix some bugs	simont	8056d 07h	/
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	8059d 14h	/
29	fix some bugs	simont	8059d 14h	/
28	remove syn signal	simont	8059d 14h	/
27	fix some bugs	simont	8059d 15h	/
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	8059d 16h	/
25	divider and multiplier pass test	markom	8060d 11h	/
24	intensively tests all instructions	markom	8060d 16h	/
23	mul & div use 4 clocks	simont	8061d 06h	/
22	fix some bugs	simont	8061d 06h	/
21	mul bug fixed	markom	8061d 12h	/
20	multiplier and divider changed so they complete in 4 cycles	markom	8061d 14h	/
19	combinatorial loop removed	simont	8062d 07h	/
18	rst signal added	simont	8065d 12h	/
17	fix some bugs	simont	8065d 12h	/
16	inputs ram and op2 removed	simont	8065d 12h	/
15	commbinatorial loop removed	simont	8065d 12h	/
14	added signal ea_int	simont	8065d 13h	/
13	some bug fix	simont	8066d 10h	/
12	des1_r in alu port list	simont	8066d 10h	/