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Rev Log message Author Age Path
122 converted float representations to hex sybreon 5956d 22h /
121 Added C/C++ compatible #ifdef statements sybreon 5957d 17h /
120 Basic version with some features left out. sybreon 5957d 17h /
119 Initial import. sybreon 5957d 17h /
118 Initial import. sybreon 5960d 09h /
117 added a rendezvous function sybreon 5965d 19h /
116 Added malloc() lock and unlock routines sybreon 5965d 20h /
115 This commit was manufactured by cvs2svn to create branch 'DEV_SYBREON'. 5966d 18h /
114 changed MSR bits sybreon 5966d 18h /
113 initial checkin sybreon 5966d 18h /
112 *** empty log message *** sybreon 5966d 18h /
111 added static assert hack sybreon 5966d 18h /
110 added cache controls sybreon 5966d 21h /
109 added interrupt controls (may need to be factorised out) sybreon 5966d 22h /
108 changed semaphore case sybreon 5966d 22h /
107 Added new C++ files sybreon 5968d 14h /
106 Made code work with newlib's malloc(); sybreon 6037d 14h /
105 Patch interrupt bug. sybreon 6048d 08h /
104 Uses multiplier + barrel shifter as default. sybreon 6049d 17h /
103 Patched problem where memory access followed by dual cycle instructions were not stalling correctly (submitted by M. Ettus) sybreon 6049d 17h /
102 Fix MTS during interrupt vectoring bug (reported by M. Ettus). sybreon 6049d 18h /
101 Made multiplier pause with pipeline sybreon 6059d 14h /
100 multiplier issues sybreon 6059d 14h /
99 Minor cleanup sybreon 6071d 09h /
98 Minor typo sybreon 6071d 12h /
97 Added malloc() test sybreon 6071d 12h /
96 Stalls pipeline on MUL/BSF instructions results in minor speed improvements. sybreon 6074d 11h /
95 Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models. sybreon 6076d 13h /
94 Prevent fHZD & rBRA[1] sybreon 6078d 11h /
93 Minor enable fix sybreon 6078d 11h /

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