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Rev Log message Author Age Path
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7937d 15h /
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7937d 21h /
160 error acknowledge cycle termination added to display. mohor 7937d 21h /
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 7938d 17h /
158 Typo fixed. mohor 7938d 17h /
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7940d 23h /
156 Valid testbench. mohor 7940d 23h /
155 Minor changes. mohor 7940d 23h /
154 Design document is still under construction. mohor 7941d 22h /
153 Temp version (backup). mohor 7942d 13h /
152 Version 1.16 created. See revision history in the document for details. mohor 7942d 13h /
151 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7942d 15h /
150 Debug registers reg1, 2, 3, 4 connected. Synchronization of many signals
changed (bugs fixed). Access to un-alligned buffers fixed. RxAbort signal
was not used OK.		 mohor 7942d 15h /
149 Signals related to the control frames connected. Debug registers reg1, 2, 3, 4
connected.		 mohor 7942d 15h /
148 Bug when last byte of destination address was not checked fixed. mohor 7942d 15h /
147 ETH_TXCTRL and ETH_RXCTRL registers added. Interrupts related to
the control frames connected.		 mohor 7942d 15h /
146 CarrierSenseLost status is not set when working in loopback mode. mohor 7942d 15h /
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 7942d 15h /
144 This commit was manufactured by cvs2svn to create tag
'runing_under_uclinux'.		 7958d 18h /
143 Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.		 mohor 7958d 18h /
142 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7961d 11h /
141 Syntax error fixed. mohor 7961d 11h /
140 Syntax error fixed. mohor 7961d 11h /
139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.		 mohor 7961d 11h /
138 Synchronous reset added. mohor 7961d 12h /
137 Defines for register width added. mii_rst signal in MIIMODER register
changed.		 mohor 7961d 12h /
136 Parameter ResetValue changed to capital letters. mohor 7961d 21h /
135 New revision. External DMA removed, TX_BD_NUM changed. mohor 7963d 13h /
134 Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No
need to multiply or devide any more.		 mohor 7963d 14h /
133 - Busy signal was not set on time when scan status operation was performed
and clock was divided with more than 2.
- Nvalid remains valid two more clocks (was previously cleared too soon).		 mohor 7963d 15h /

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