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Rev Log message Author Age Path
352 Removed delayed assignments from rtl code olof 4809d 02h /
351 Turn defines into parameters in eth_cop olof 4817d 16h /
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4817d 17h /
349 Make all parameters configurable from top level olof 4818d 18h /
348 Added option to dump VCD files olof 4819d 16h /
347 Added information about running with Icarus Verilog olof 4819d 17h /
346 Updated project location olof 4819d 19h /
345 Temporarily disable failing tests olof 4819d 21h /
344 bit 9 in phy control register is self clearing olof 4825d 23h /
343 Address miss should not be asserted on short frames olof 4829d 19h /
342 Added cast to avoid inequality when comparing different data types olof 4829d 19h /
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4829d 19h /
340 Don't fail if log dir already exists olof 4830d 17h /
339 Added basic support for Icarus Verilog olof 4831d 16h /
338 root 5623d 22h /
337 root 5680d 00h /
336 Added old uploaded documents to new repository. root 5681d 03h /
335 New directory structure. root 5681d 03h /
334 Minor fixes for Icarus simulator. igorm 7129d 05h /
333 Some small fixes + some troubles fixed. igorm 7129d 17h /
332 Case statement improved for synthesys. igorm 7142d 22h /
331 Tests for delayed CRC and defer indication added. igorm 7158d 00h /
330 Warning fixes. igorm 7158d 00h /
329 Defer indication fixed. igorm 7158d 01h /
328 Delayed CRC fixed. igorm 7158d 01h /
327 Defer indication fixed. igorm 7158d 02h /
326 Delayed CRC fixed. igorm 7158d 02h /
325 Defer indication fixed. igorm 7158d 02h /
324 This commit was manufactured by cvs2svn to create tag 'rel_27'. 7455d 02h /
323 Accidently deleted line put back. igorm 7455d 02h /

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