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Rev Log message Author Age Path
142 Support downloading programs via serial port rhoads 6735d 15h /
141 Major changes -- updated to Plasma Version 3 rhoads 6736d 14h /
140 This commit was manufactured by cvs2svn to create tag 'V3_0'. 6736d 17h /
139 Major changes -- updated to Plasma Version 3 rhoads 6736d 17h /
138 Realtime Operating System: Updated to Plasma Version 3 rhoads 6736d 17h /
137 Updated to Plasma Version 3 rhoads 6736d 17h /
136 Better setting of $GP register rhoads 6736d 18h /
135 Added lots of spaces rhoads 7077d 17h /
134 Added lots of spaces rhoads 7077d 17h /
133 Fixed bug when MIPS executable compiled under Linux. Added lots of spaces rhoads 7077d 18h /
132 Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly. rhoads 7216d 16h /
131 Changed "GENERIC" to "DEFAULT" to be Xilinx friendly. rhoads 7216d 16h /
130 Added better spacing rhoads 7216d 16h /
129 Added reset_in to sensitivity list rhoads 7235d 16h /
128 Reset all registers, constants now upper case. rhoads 7354d 03h /
127 This commit was manufactured by cvs2svn to create tag 'V2_1'. 7372d 17h /
126 Added note that CC is for x86 and gmake has problems with MIPS gcc libraries. rhoads 7372d 17h /
125 Fixed pc_source_type comment. rhoads 7372d 17h /
124 Holger Lohn's fix for interrupts when 3-state pipeline enabled. rhoads 7372d 17h /
123 Uncomment out the Altera portion. Xilinx users may need to re-comment out this section. rhoads 7439d 17h /
122 Added comment to explain why c_bus isn't delayed but reg_dest is delayed. rhoads 7503d 18h /
121 Added Matthias Gruenewald's tri-state area-optimized option rhoads 7515d 06h /
120 Make generics "GENERIC" rhoads 7515d 06h /
119 Opcodes from count.c rhoads 7553d 17h /
118 Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7553d 17h /
117 Part of Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7553d 17h /
116 Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA. rhoads 7553d 17h /
115 Matthias Grunewald's changes for Xilinx FPGA dual-port RAM. rhoads 7553d 17h /
114 Matthias Grunewald's changes to get synthesis to work with Synopsys' FPGA Compiler II. rhoads 7553d 17h /
113 Matthias Grunewald's bug fixes:
Branch and compare instructions didn't interpret immediate as signed.		 rhoads 7553d 17h /

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