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Rev Log message Author Age Path
133 - Fixed bug with ST opcodes. cwalter 6403d 15h /
132 Added test program for testing uart. jlechner 6403d 15h /
131 Changed high active resets to low active ones. jlechner 6403d 15h /
130 Removed obsolete line jlechner 6403d 15h /
129 Sample assembler program for accessing uart jlechner 6403d 15h /
128 Added multiplexer for output data. This mutliplexer decides on the adress of the last cycles
if ordinary memory data or data of an extension module have to be passed on.		 jlechner 6403d 15h /
127 Changed high active resets to low active ones. jlechner 6403d 15h /
126 Added constant for cpu frequency (needed for UART) trinklhar 6403d 22h /
125 Fixed vhdl bugs trinklhar 6403d 22h /
124 Assigned UART signals to ports on top-level entity trinklhar 6403d 22h /
123 Removed UART again trinklhar 6403d 23h /
122 Removed UART again again trinklhar 6403d 23h /
121 Added address constants for uart access (memory mapped I/O) trinklhar 6403d 23h /
120 Added UART module to memory entity trinklhar 6403d 23h /
119 Uart wieder ausgebaut trinklhar 6404d 18h /
118 insert Uart address constant trinklhar 6404d 18h /
117 Uart im mem_stage trinklhar 6404d 18h /
116 writes to uart when write to reg 0 trinklhar 6406d 00h /
115 *** empty log message *** trinklhar 6406d 14h /
114 Uart 0.3 trinklhar 6407d 18h /
113 Uart reset funkt trinklhar 6407d 19h /
112 Uart drin aber signale nicht eingebunden trinklhar 6407d 21h /
111 - Fixed bug where certain opcodes did not check for availability of
registers.		 cwalter 6410d 13h /
110 - Added missing file to CVS. cwalter 6410d 19h /
109 - Assembler code for ST produced wrong instruction format. cwalter 6411d 11h /
108 no message cwalter 6411d 11h /
107 - Added new example for memory testing. cwalter 6411d 11h /
106 - ALUOP1_LD_MEM_BIT must be checked within ALUOP1_WB_REG_BIT. cwalter 6411d 11h /
105 - OPCODE_ST_DISP must not set ALUOP1_WB_REG_BIT. cwalter 6411d 11h /
104 - Added missing signal dmem_data_in. cwalter 6411d 12h /

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