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Rev Log message Author Age Path
204 * suppress p2_output_pch_o when p2_output_exp is active
* wire xtal_i to interrupt module		 arniml 6831d 08h /.
203 * shift assertion of ALE and PROG to xtal3
* correct change of revision 1.8		 arniml 6831d 08h /.
202 fix address assignment arniml 6831d 08h /.
201 split low impedance markers for P2 arniml 6831d 08h /.
200 add check for
tCP: Port Control Setup to PROG'		 arniml 6831d 08h /.
199 initial check-in arniml 6831d 08h /.
198 fix package dependencies arniml 6831d 12h /.
197 preliminary version 0.3 arniml 6832d 15h /.
196 update to version 0.3 arniml 6832d 15h /.
195 Suppress assertion of bus_read_bus_s when interrupt is pending.
This should fix bug report
"PROBLEM WHEN INT AND JMP"		 arniml 6832d 19h /.
194 initial check-in arniml 6832d 19h /.
193 iManual arniml 6847d 21h /.
192 update list for Wishbone toplevel arniml 6848d 08h /.
191 preliminary version 0.2 arniml 6848d 11h /.
190 finalize change log for release 0.6 beta arniml 6849d 06h /.
189 add bug report
"Target address of JMP and CALL to Program Memory Bank 1 corrupted by interrupt"		 arniml 6880d 08h /.
188 move check for int_pending_s into ea_i_='0' branch
this fixes a glitch on PCH when an interrutp occurs
during external program memory fetch		 arniml 6880d 08h /.
187 Fix bug reports:
"Target address of JMP to Program Memory Bank 1 corrupted by interrupt"
"Return address of CALL to Program Memory Bank 1 corrupted by interrupt"
int_in_progress_o was active one cycle before int_pending_o is
asserted. this confused the mb multiplexer which determines the state of
the memory bank selection flag		 arniml 6880d 08h /.
186 update to version 0.2 arniml 6881d 09h /.
185 initial check-in arniml 6886d 07h /.
184 initial check-in arniml 6886d 09h /.
183 fix missing assignment to outclock arniml 6886d 11h /.
182 intermediate version arniml 6966d 10h /.
181 fix typo arniml 6966d 13h /.
180 introduce prefix 't48_' for wb_master entity and configuration arniml 6974d 19h /.
179 introduce prefix 't48_' for all packages, entities and configurations arniml 6974d 19h /.
178 Move latching of BUS to MSTATE2
-> sample BUS at the end of RD'		 arniml 6976d 07h /.
177 Implement db_dir_o glitch-safe arniml 6976d 07h /.
176 Use en_clk_i instead of xtal3_s for generation of external signals.
This is required when the core runs with full xtal clock instead
of xtal/3 (xtal_div_3_g = 0).		 arniml 6976d 07h /.
175 add bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6977d 10h /.

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