OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl] - Rev 108

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
108 fix some bugs, use oc8051_cache_ram. simont 7768d 09h /8051/tags/rel_12/rtl
107 Include instruction cache. simont 7768d 09h /8051/tags/rel_12/rtl
105 generic_dpram used simont 7769d 12h /8051/tags/rel_12/rtl
104 use generic_dpram simont 7769d 12h /8051/tags/rel_12/rtl
102 raname signals. simont 7769d 13h /8051/tags/rel_12/rtl
95 updating... simont 7769d 17h /8051/tags/rel_12/rtl
94 fix bug. simont 7769d 17h /8051/tags/rel_12/rtl
93 OC8051_XILINX_RAM added simont 7769d 17h /8051/tags/rel_12/rtl
92 initial inport simont 7769d 17h /8051/tags/rel_12/rtl
90 change module name. simont 7774d 10h /8051/tags/rel_12/rtl
89 Replaced oc8051_ram by generic_dpram. rherveille 7835d 14h /8051/tags/rel_12/rtl
88 fix bugs simont 7840d 14h /8051/tags/rel_12/rtl
87 add include oc8051_defines.v simont 7840d 14h /8051/tags/rel_12/rtl
82 replace some modules simont 7848d 14h /8051/tags/rel_12/rtl
81 initial import simont 7848d 14h /8051/tags/rel_12/rtl
80 removing unused modules simont 7848d 14h /8051/tags/rel_12/rtl
78 alu with registered outputs simont 7908d 14h /8051/tags/rel_12/rtl
77 substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel simont 7917d 11h /8051/tags/rel_12/rtl
76 add module oc8051_sfr, 256 bytes internal ram simont 7917d 11h /8051/tags/rel_12/rtl
75 initial import simont 7917d 11h /8051/tags/rel_12/rtl
73 initial import simont 7925d 11h /8051/tags/rel_12/rtl
72 fix bug in interface to external data ram simont 7925d 13h /8051/tags/rel_12/rtl
67 add parameters for instruction cache simont 7929d 14h /8051/tags/rel_12/rtl
62 fix bugs in instruction interface simont 7930d 11h /8051/tags/rel_12/rtl
54 cahnge interface to instruction rom simont 7936d 09h /8051/tags/rel_12/rtl
47 remove unused files simont 7953d 10h /8051/tags/rel_12/rtl
46 prepared header simont 7953d 10h /8051/tags/rel_12/rtl
45 prepared header simont 7953d 11h /8051/tags/rel_12/rtl
44 prepared header simont 7953d 11h /8051/tags/rel_12/rtl
41 remove unused files simont 7953d 13h /8051/tags/rel_12/rtl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.