OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2] - Rev 25

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 divider and multiplier pass test markom 8026d 13h /8051/tags/rel_2
24 intensively tests all instructions markom 8026d 17h /8051/tags/rel_2
23 mul & div use 4 clocks simont 8027d 08h /8051/tags/rel_2
22 fix some bugs simont 8027d 08h /8051/tags/rel_2
21 mul bug fixed markom 8027d 13h /8051/tags/rel_2
20 multiplier and divider changed so they complete in 4 cycles markom 8027d 16h /8051/tags/rel_2
19 combinatorial loop removed simont 8028d 08h /8051/tags/rel_2
18 rst signal added simont 8031d 14h /8051/tags/rel_2
17 fix some bugs simont 8031d 14h /8051/tags/rel_2
16 inputs ram and op2 removed simont 8031d 14h /8051/tags/rel_2
15 commbinatorial loop removed simont 8031d 14h /8051/tags/rel_2
14 added signal ea_int simont 8031d 15h /8051/tags/rel_2
13 some bug fix simont 8032d 12h /8051/tags/rel_2
12 des1_r in alu port list simont 8032d 12h /8051/tags/rel_2
11 des2_r removed simont 8032d 12h /8051/tags/rel_2
10 % replaced with ^ in uart; some minor improvements markom 8032d 18h /8051/tags/rel_2
9 removed unused compare states markom 8034d 11h /8051/tags/rel_2
8 some IDS optimizations markom 8034d 11h /8051/tags/rel_2
7 immediate1 & immediate2 registers moved to oc8051_immediate_sel markom 8034d 12h /8051/tags/rel_2
6 psw combinatorial loop removed markom 8034d 14h /8051/tags/rel_2
5 more linter corrections; 2 tests still fail markom 8034d 14h /8051/tags/rel_2
4 Code repaired to satisfy the linter; testbech fails markom 8034d 16h /8051/tags/rel_2
2 Initial CVS import simont 8050d 14h /8051/tags/rel_2
1 Standard project directories initialized by cvs2svn. 8050d 14h /8051/tags/rel_2

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.