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[/] [axi4_tlm_bfm/] - Rev 40

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40 Added asynchronous reset in tester logic. daniel.kho 3837d 07h /axi4_tlm_bfm
39 Deprecated symbolsPerTransfer and outstandingTransactions; replaced with lastTransaction. Fixed small bug in BFM; tData and tValid should be valid even for the last transaction. daniel.kho 3847d 17h /axi4_tlm_bfm
38 Added coverage-driven randomisation to tester. daniel.kho 3847d 17h /axi4_tlm_bfm
37 Refactored nReset to reset for real hardware. daniel.kho 3867d 07h /axi4_tlm_bfm
36 Added missing pkg-types.vhdl file for simulation. daniel.kho 3894d 06h /axi4_tlm_bfm
35 More fixes to Windows script. daniel.kho 3899d 16h /axi4_tlm_bfm
34 Added double-quotes for Windows script. daniel.kho 3899d 17h /axi4_tlm_bfm
33 Removed semicolons for Windows script. daniel.kho 3899d 17h /axi4_tlm_bfm
32 Added compile+simulate script for Windows. daniel.kho 3899d 17h /axi4_tlm_bfm
31 Added initial Xilinx Vivado synthesis scripts and constraints. daniel.kho 3913d 15h /axi4_tlm_bfm
30 Refactored synthesis scripts. daniel.kho 3913d 15h /axi4_tlm_bfm
29 Updated simulation scripts. daniel.kho 3913d 15h /axi4_tlm_bfm
28 Temporarily remove simulation folder. daniel.kho 3913d 15h /axi4_tlm_bfm
27 Updated simulation scripts. daniel.kho 3913d 15h /axi4_tlm_bfm
26 Refactored simulation folders. daniel.kho 3913d 16h /axi4_tlm_bfm
25 Refactored folders. daniel.kho 3913d 16h /axi4_tlm_bfm
24 Updated simulation sources to reflect changes made for synthesis. daniel.kho 3913d 16h /axi4_tlm_bfm
23 Added top-level user example used in technical paper. daniel.kho 3921d 10h /axi4_tlm_bfm
22 Added pin assignments for BeMicro kit. Added demo top-level used in technical paper. daniel.kho 3921d 10h /axi4_tlm_bfm
21 Added synthesis files for Vivado. The RTL have not yet been updated with the latest changes available in the Quartus version. daniel.kho 3924d 12h /axi4_tlm_bfm
20 Updated simulation scripts. daniel.kho 3924d 12h /axi4_tlm_bfm
19 Updated synthesis constraints and scripts. daniel.kho 3924d 12h /axi4_tlm_bfm
18 Added hardware PRBS generator, modularised top-level by having separate file as the tester. daniel.kho 3924d 13h /axi4_tlm_bfm
17 Added more pipelining, enhancements. Tested on BeMicro kit. daniel.kho 3924d 13h /axi4_tlm_bfm
16 Moved transaction counter from BFM to user. This gives the user more control over the number of transactions. The BFM now treats this as an input. daniel.kho 4027d 09h /axi4_tlm_bfm
15 [minor]: cleaned up sources. daniel.kho 4029d 16h /axi4_tlm_bfm
14 Added simple reset logic and verified on hardware. Added PLL to supply test clock to SignalTap. daniel.kho 4038d 06h /axi4_tlm_bfm
13 Fixed one-cycle extra read issue, occurring during fast read. Verified on hardware as well. daniel.kho 4038d 11h /axi4_tlm_bfm
12 Used generic package instead of using tauhop.tlm (abstract package) directly, and updated corresponding context paths. Simulated fine with ModelSim 10.1b. [previous]: Previous update included synthesis fixes ported from simulation sources. daniel.kho 4047d 15h /axi4_tlm_bfm
11 Synthesised design with bugfixes discovered during simulation. Basically, these bugfixes just checks the design's behaviour against the AXI spec, and make sure the assumptions match. daniel.kho 4049d 09h /axi4_tlm_bfm

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