OpenCores
URL https://opencores.org/ocsvn/bustap-jtag/bustap-jtag/trunk

Subversion Repositories bustap-jtag

[/] [bustap-jtag/] - Rev 22

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
22 ash_riple 3833d 09h /bustap-jtag
21 ash_riple 3833d 10h /bustap-jtag
20 Added support for 32bit Address bus. ash_riple 3833d 10h /bustap-jtag
19 Minor changes. ash_riple 4247d 05h /bustap-jtag
18 Added support for Xilinx Chips.
Added support for AXI4-Lite bus. Can be used as an XPS IP.		 ash_riple 4247d 06h /bustap-jtag
17 Added unreachable trigger condition "@WR & @RD" checking. ash_riple 4493d 08h /bustap-jtag
16 Released version 2.2. ash_riple 4515d 09h /bustap-jtag
15 Released version 2.2. ash_riple 4515d 09h /bustap-jtag
14 Changed dec to hex value of triggerPnum. ash_riple 4516d 00h /bustap-jtag
13 Added minor syntax changes and Linux environment simulation script. ash_riple 4516d 05h /bustap-jtag
12 Added timing information to the capture content. ash_riple 4516d 13h /bustap-jtag
11 Added pre-trigger capture. ash_riple 4517d 04h /bustap-jtag
10 Changed the location/reference/generation of compiler directive file: jtag_sim_define.h, to have better code structure. ash_riple 4522d 10h /bustap-jtag
9 Added testbench with interactive GUI. Start it from "sim.bat" or "do sim.do".
Virtual JTAG stimulus can only be entered statically before simulation starts.
FIFO operation can be simulated dynamically while simulation is run.		 ash_riple 4523d 04h /bustap-jtag
8 Added fault handling of wrong input length in the GUI. ash_riple 4527d 04h /bustap-jtag
7 Added references related to "Bus Monitor". ash_riple 4527d 08h /bustap-jtag
6 Updated to 2.1. New features added as in doc/Revision History.txt. ash_riple 4528d 04h /bustap-jtag
5 Created code base for 2.x development.
Now supporting pipelined read/write access. Provided wrapper can be used as an example to connect up_monitor to any bus.		 ash_riple 4531d 05h /bustap-jtag
4 Created tag for original source code. Version 1.0. ash_riple 4531d 08h /bustap-jtag
3 Added original article. ash_riple 4531d 08h /bustap-jtag
2 Checked in working code base. ash_riple 4535d 04h /bustap-jtag
1 The project and the structure was created root 4535d 18h /bustap-jtag

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.