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[/] [can/] [trunk/] [rtl/] - Rev 138

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Rev Log message Author Age Path
138 Header changed. Address latched to posedge. bus_off_on signal added. mohor 7489d 21h /can/trunk/rtl
137 Header changed. mohor 7489d 21h /can/trunk/rtl
136 Error counters changed. mohor 7489d 22h /can/trunk/rtl
135 Header changed. mohor 7489d 22h /can/trunk/rtl
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.		 mohor 7597d 19h /can/trunk/rtl
130 mbist signals updated according to newest convention markom 7604d 06h /can/trunk/rtl
129 Error counters changed. mohor 7620d 15h /can/trunk/rtl
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.		 mohor 7621d 11h /can/trunk/rtl
125 Synchronization changed, error counters fixed. mohor 7625d 17h /can/trunk/rtl
124 ALTERA_RAM supported. mohor 7645d 23h /can/trunk/rtl
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7653d 05h /can/trunk/rtl
118 Artisan RAM fixed (when not using BIST). mohor 7662d 02h /can/trunk/rtl
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7662d 02h /can/trunk/rtl
115 Artisan ram instances added. simons 7667d 20h /can/trunk/rtl
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7694d 21h /can/trunk/rtl
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7696d 21h /can/trunk/rtl
110 Fixed according to the linter. mohor 7696d 21h /can/trunk/rtl
109 Fixed according to the linter. mohor 7696d 22h /can/trunk/rtl
108 Fixed according to the linter. mohor 7696d 22h /can/trunk/rtl
107 Fixed according to the linter. mohor 7696d 23h /can/trunk/rtl
106 Unused signal removed. mohor 7702d 20h /can/trunk/rtl
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7703d 10h /can/trunk/rtl
102 Little fixes (to fix warnings). mohor 7706d 01h /can/trunk/rtl
100 Synchronization changed. mohor 7710d 02h /can/trunk/rtl
99 PCI_BIST replaced with CAN_BIST. mohor 7710d 02h /can/trunk/rtl
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7715d 14h /can/trunk/rtl
95 Virtual silicon ram instances added. simons 7715d 15h /can/trunk/rtl
93 synthesis full_case parallel_case fixed. mohor 7721d 02h /can/trunk/rtl
92 clkout is clk/2 after the reset. mohor 7721d 10h /can/trunk/rtl
90 paralel_case and full_case compiler directives added to case statements. mohor 7722d 00h /can/trunk/rtl

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