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[/] [can/] [trunk/] [rtl] - Rev 118

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Rev Log message Author Age Path
118 Artisan RAM fixed (when not using BIST). mohor 7662d 08h /can/trunk/rtl
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7662d 08h /can/trunk/rtl
115 Artisan ram instances added. simons 7668d 01h /can/trunk/rtl
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7695d 02h /can/trunk/rtl
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7697d 02h /can/trunk/rtl
110 Fixed according to the linter. mohor 7697d 02h /can/trunk/rtl
109 Fixed according to the linter. mohor 7697d 04h /can/trunk/rtl
108 Fixed according to the linter. mohor 7697d 04h /can/trunk/rtl
107 Fixed according to the linter. mohor 7697d 04h /can/trunk/rtl
106 Unused signal removed. mohor 7703d 02h /can/trunk/rtl
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7703d 16h /can/trunk/rtl
102 Little fixes (to fix warnings). mohor 7706d 06h /can/trunk/rtl
100 Synchronization changed. mohor 7710d 08h /can/trunk/rtl
99 PCI_BIST replaced with CAN_BIST. mohor 7710d 08h /can/trunk/rtl
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7715d 19h /can/trunk/rtl
95 Virtual silicon ram instances added. simons 7715d 21h /can/trunk/rtl
93 synthesis full_case parallel_case fixed. mohor 7721d 08h /can/trunk/rtl
92 clkout is clk/2 after the reset. mohor 7721d 16h /can/trunk/rtl
90 paralel_case and full_case compiler directives added to case statements. mohor 7722d 05h /can/trunk/rtl
88 Previous change removed. When resynchronization occurs we go to seg1
stage. sync stage does not cause another start of seg1 stage.		 mohor 7723d 03h /can/trunk/rtl
87 When hard_sync or resync occure we need to go to seg1 segment. Going to
sync segment is in that case blocked.		 mohor 7723d 03h /can/trunk/rtl
85 Typo fixed. mohor 7724d 19h /can/trunk/rtl
84 clk_cnt reduced from [8:0] to [6:0]. mohor 7726d 02h /can/trunk/rtl
82 Removed few signals. mohor 7726d 03h /can/trunk/rtl
81 "chip select" signal cs_can_i is used only when not using WISHBONE
interface.		 mohor 7726d 03h /can/trunk/rtl
80 Form error was detected when stuff bit occured at the end of crc. mohor 7726d 03h /can/trunk/rtl
79 Bit stuffing corrected when stuffing comes at the end of the crc. tadejm 7727d 03h /can/trunk/rtl
78 tx_point generated one clk earlier. rx_i registered. Data corrected when
using extended mode.		 mohor 7727d 04h /can/trunk/rtl
77 Synchronization is also needed when transmitting a message. mohor 7730d 03h /can/trunk/rtl
76 Counters width changed. mohor 7730d 03h /can/trunk/rtl

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