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[/] [dbg_interface/] [tags/] [asyst_2/] [rtl] - Rev 100

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Rev Log message Author Age Path
100 *** empty log message *** mohor 7547d 00h /dbg_interface/tags/asyst_2/rtl
99 cpu registers added. mohor 7547d 00h /dbg_interface/tags/asyst_2/rtl
97 Working. mohor 7548d 03h /dbg_interface/tags/asyst_2/rtl
95 Temp version. mohor 7548d 16h /dbg_interface/tags/asyst_2/rtl
94 temp version. Resets will be changed in next version. mohor 7549d 03h /dbg_interface/tags/asyst_2/rtl
93 tmp version. mohor 7550d 04h /dbg_interface/tags/asyst_2/rtl
92 temp version. mohor 7553d 07h /dbg_interface/tags/asyst_2/rtl
91 tmp version. mohor 7554d 03h /dbg_interface/tags/asyst_2/rtl
90 tmp version. mohor 7554d 21h /dbg_interface/tags/asyst_2/rtl
89 temp4 version. mohor 7556d 03h /dbg_interface/tags/asyst_2/rtl
88 temp3 version. mohor 7556d 22h /dbg_interface/tags/asyst_2/rtl
87 tmp2 version. mohor 7558d 03h /dbg_interface/tags/asyst_2/rtl
86 Tmp version. mohor 7570d 23h /dbg_interface/tags/asyst_2/rtl
83 Small fix. mohor 7571d 00h /dbg_interface/tags/asyst_2/rtl
82 New directory structure. New version of the debug interface. mohor 7571d 00h /dbg_interface/tags/asyst_2/rtl
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7571d 00h /dbg_interface/tags/asyst_2/rtl
77 MBIST chain connection fixed. mohor 7631d 21h /dbg_interface/tags/asyst_2/rtl
73 CRC logic changed. mohor 7631d 23h /dbg_interface/tags/asyst_2/rtl
71 Mbist support added. simons 7634d 06h /dbg_interface/tags/asyst_2/rtl
67 Lower two address lines must be always zero. simons 7667d 01h /dbg_interface/tags/asyst_2/rtl
65 WB_CNTL register added, some syncronization fixes. simons 7668d 01h /dbg_interface/tags/asyst_2/rtl
63 Three more chains added for cpu debug access. simons 7688d 01h /dbg_interface/tags/asyst_2/rtl
61 Lapsus fixed. simons 7716d 01h /dbg_interface/tags/asyst_2/rtl
59 Reset value for riscsel register set to 1. simons 7716d 02h /dbg_interface/tags/asyst_2/rtl
57 Multiple cpu support added. simons 7716d 03h /dbg_interface/tags/asyst_2/rtl
53 Trst active high. Inverted on higher layer. mohor 7983d 01h /dbg_interface/tags/asyst_2/rtl
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7983d 01h /dbg_interface/tags/asyst_2/rtl
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 8010d 13h /dbg_interface/tags/asyst_2/rtl
47 mon_cntl_o signals that controls monitor mux added. mohor 8166d 01h /dbg_interface/tags/asyst_2/rtl
46 Asynchronous reset used instead of synchronous. mohor 8174d 07h /dbg_interface/tags/asyst_2/rtl

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