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[/] [dbg_interface/] [tags/] [asyst_2/] [rtl] - Rev 92

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Rev Log message Author Age Path
92 temp version. mohor 7524d 10h /dbg_interface/tags/asyst_2/rtl
91 tmp version. mohor 7525d 05h /dbg_interface/tags/asyst_2/rtl
90 tmp version. mohor 7526d 00h /dbg_interface/tags/asyst_2/rtl
89 temp4 version. mohor 7527d 06h /dbg_interface/tags/asyst_2/rtl
88 temp3 version. mohor 7528d 00h /dbg_interface/tags/asyst_2/rtl
87 tmp2 version. mohor 7529d 05h /dbg_interface/tags/asyst_2/rtl
86 Tmp version. mohor 7542d 01h /dbg_interface/tags/asyst_2/rtl
83 Small fix. mohor 7542d 02h /dbg_interface/tags/asyst_2/rtl
82 New directory structure. New version of the debug interface. mohor 7542d 02h /dbg_interface/tags/asyst_2/rtl
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7542d 02h /dbg_interface/tags/asyst_2/rtl
77 MBIST chain connection fixed. mohor 7602d 23h /dbg_interface/tags/asyst_2/rtl
73 CRC logic changed. mohor 7603d 01h /dbg_interface/tags/asyst_2/rtl
71 Mbist support added. simons 7605d 08h /dbg_interface/tags/asyst_2/rtl
67 Lower two address lines must be always zero. simons 7638d 04h /dbg_interface/tags/asyst_2/rtl
65 WB_CNTL register added, some syncronization fixes. simons 7639d 03h /dbg_interface/tags/asyst_2/rtl
63 Three more chains added for cpu debug access. simons 7659d 04h /dbg_interface/tags/asyst_2/rtl
61 Lapsus fixed. simons 7687d 03h /dbg_interface/tags/asyst_2/rtl
59 Reset value for riscsel register set to 1. simons 7687d 04h /dbg_interface/tags/asyst_2/rtl
57 Multiple cpu support added. simons 7687d 05h /dbg_interface/tags/asyst_2/rtl
53 Trst active high. Inverted on higher layer. mohor 7954d 03h /dbg_interface/tags/asyst_2/rtl
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7954d 03h /dbg_interface/tags/asyst_2/rtl
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7981d 15h /dbg_interface/tags/asyst_2/rtl
47 mon_cntl_o signals that controls monitor mux added. mohor 8137d 03h /dbg_interface/tags/asyst_2/rtl
46 Asynchronous reset used instead of synchronous. mohor 8145d 09h /dbg_interface/tags/asyst_2/rtl
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8152d 05h /dbg_interface/tags/asyst_2/rtl
44 Signal names changed to lower case. mohor 8152d 05h /dbg_interface/tags/asyst_2/rtl
43 Intentional error removed. mohor 8157d 04h /dbg_interface/tags/asyst_2/rtl
42 A block for checking possible simulation/synthesis missmatch added. mohor 8157d 06h /dbg_interface/tags/asyst_2/rtl
41 Function changed to logic because of some synthesis warnings. mohor 8165d 03h /dbg_interface/tags/asyst_2/rtl
40 Signal tdo_padoe_o changed back to tdo_padoen_o. mohor 8179d 03h /dbg_interface/tags/asyst_2/rtl

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