OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_19/] [bench] - Rev 92

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
92 temp version. mohor 7503d 13h /dbg_interface/tags/rel_19/bench
91 tmp version. mohor 7504d 08h /dbg_interface/tags/rel_19/bench
90 tmp version. mohor 7505d 03h /dbg_interface/tags/rel_19/bench
89 temp4 version. mohor 7506d 09h /dbg_interface/tags/rel_19/bench
88 temp3 version. mohor 7507d 04h /dbg_interface/tags/rel_19/bench
87 tmp2 version. mohor 7508d 09h /dbg_interface/tags/rel_19/bench
80 New version of the debug interface. Not finished, yet. mohor 7521d 07h /dbg_interface/tags/rel_19/bench
75 Simulation files. mohor 7582d 05h /dbg_interface/tags/rel_19/bench
73 CRC logic changed. mohor 7582d 05h /dbg_interface/tags/rel_19/bench
63 Three more chains added for cpu debug access. simons 7638d 07h /dbg_interface/tags/rel_19/bench
47 mon_cntl_o signals that controls monitor mux added. mohor 8116d 07h /dbg_interface/tags/rel_19/bench
38 Few outputs for boundary scan chain added. mohor 8172d 07h /dbg_interface/tags/rel_19/bench
36 Structure changed. Hooks for jtag chain added. mohor 8176d 06h /dbg_interface/tags/rel_19/bench
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8316d 10h /dbg_interface/tags/rel_19/bench
15 bs_chain_o added. mohor 8318d 11h /dbg_interface/tags/rel_19/bench
13 Signal names changed to lowercase. mohor 8319d 11h /dbg_interface/tags/rel_19/bench
12 Wishbone interface added, few fixes for better performance,
hooks for boundary scan testing added.		 mohor 8320d 11h /dbg_interface/tags/rel_19/bench
11 Changes connected to the OpenRISC access (SPR read, SPR write). mohor 8341d 07h /dbg_interface/tags/rel_19/bench
9 Working version. Few bugs fixed, comments added. mohor 8345d 11h /dbg_interface/tags/rel_19/bench
6 Minor changes for simulation. mohor 8346d 09h /dbg_interface/tags/rel_19/bench
5 Trace fixed. Some registers changed, trace simplified. mohor 8347d 07h /dbg_interface/tags/rel_19/bench
2 Initial official release. mohor 8352d 07h /dbg_interface/tags/rel_19/bench

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.