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[/] [dbg_interface/] [tags/] [rel_22] - Rev 92

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Rev Log message Author Age Path
92 temp version. mohor 7492d 11h /dbg_interface/tags/rel_22
91 tmp version. mohor 7493d 06h /dbg_interface/tags/rel_22
90 tmp version. mohor 7494d 01h /dbg_interface/tags/rel_22
89 temp4 version. mohor 7495d 07h /dbg_interface/tags/rel_22
88 temp3 version. mohor 7496d 02h /dbg_interface/tags/rel_22
87 tmp2 version. mohor 7497d 07h /dbg_interface/tags/rel_22
86 Tmp version. mohor 7510d 03h /dbg_interface/tags/rel_22
85 New directory structure. New debug interface. mohor 7510d 03h /dbg_interface/tags/rel_22
84 Removed files that are not needed any more. mohor 7510d 03h /dbg_interface/tags/rel_22
83 Small fix. mohor 7510d 04h /dbg_interface/tags/rel_22
82 New directory structure. New version of the debug interface. mohor 7510d 04h /dbg_interface/tags/rel_22
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7510d 04h /dbg_interface/tags/rel_22
80 New version of the debug interface. Not finished, yet. mohor 7510d 05h /dbg_interface/tags/rel_22
77 MBIST chain connection fixed. mohor 7571d 01h /dbg_interface/tags/rel_22
75 Simulation files. mohor 7571d 02h /dbg_interface/tags/rel_22
74 Removed. mohor 7571d 03h /dbg_interface/tags/rel_22
73 CRC logic changed. mohor 7571d 03h /dbg_interface/tags/rel_22
71 Mbist support added. simons 7573d 09h /dbg_interface/tags/rel_22
70 A pdf copy of existing doc document. simons 7580d 11h /dbg_interface/tags/rel_22
69 WBCNTL added, multiple CPU support described. simons 7601d 00h /dbg_interface/tags/rel_22
67 Lower two address lines must be always zero. simons 7606d 05h /dbg_interface/tags/rel_22
65 WB_CNTL register added, some syncronization fixes. simons 7607d 04h /dbg_interface/tags/rel_22
63 Three more chains added for cpu debug access. simons 7627d 05h /dbg_interface/tags/rel_22
61 Lapsus fixed. simons 7655d 05h /dbg_interface/tags/rel_22
59 Reset value for riscsel register set to 1. simons 7655d 05h /dbg_interface/tags/rel_22
57 Multiple cpu support added. simons 7655d 07h /dbg_interface/tags/rel_22
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7922d 03h /dbg_interface/tags/rel_22
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7922d 03h /dbg_interface/tags/rel_22
53 Trst active high. Inverted on higher layer. mohor 7922d 04h /dbg_interface/tags/rel_22
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7922d 05h /dbg_interface/tags/rel_22

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