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[/] [dbg_interface/] [tags/] [rev_23] - Rev 95

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Rev	Log message	Author	Age	Path
95	Temp version.	mohor	7488d 18h	/dbg_interface/tags/rev_23
94	temp version. Resets will be changed in next version.	mohor	7489d 05h	/dbg_interface/tags/rev_23
93	tmp version.	mohor	7490d 06h	/dbg_interface/tags/rev_23
92	temp version.	mohor	7493d 09h	/dbg_interface/tags/rev_23
91	tmp version.	mohor	7494d 04h	/dbg_interface/tags/rev_23
90	tmp version.	mohor	7494d 23h	/dbg_interface/tags/rev_23
89	temp4 version.	mohor	7496d 05h	/dbg_interface/tags/rev_23
88	temp3 version.	mohor	7497d 00h	/dbg_interface/tags/rev_23
87	tmp2 version.	mohor	7498d 05h	/dbg_interface/tags/rev_23
86	Tmp version.	mohor	7511d 01h	/dbg_interface/tags/rev_23
85	New directory structure. New debug interface.	mohor	7511d 02h	/dbg_interface/tags/rev_23
84	Removed files that are not needed any more.	mohor	7511d 02h	/dbg_interface/tags/rev_23
83	Small fix.	mohor	7511d 02h	/dbg_interface/tags/rev_23
82	New directory structure. New version of the debug interface.	mohor	7511d 02h	/dbg_interface/tags/rev_23
81	New directory structure. New version of the debug interface. Files that are not needed removed.	mohor	7511d 02h	/dbg_interface/tags/rev_23
80	New version of the debug interface. Not finished, yet.	mohor	7511d 03h	/dbg_interface/tags/rev_23
77	MBIST chain connection fixed.	mohor	7571d 23h	/dbg_interface/tags/rev_23
75	Simulation files.	mohor	7572d 01h	/dbg_interface/tags/rev_23
74	Removed.	mohor	7572d 01h	/dbg_interface/tags/rev_23
73	CRC logic changed.	mohor	7572d 01h	/dbg_interface/tags/rev_23
71	Mbist support added.	simons	7574d 07h	/dbg_interface/tags/rev_23
70	A pdf copy of existing doc document.	simons	7581d 09h	/dbg_interface/tags/rev_23
69	WBCNTL added, multiple CPU support described.	simons	7601d 22h	/dbg_interface/tags/rev_23
67	Lower two address lines must be always zero.	simons	7607d 03h	/dbg_interface/tags/rev_23
65	WB_CNTL register added, some syncronization fixes.	simons	7608d 02h	/dbg_interface/tags/rev_23
63	Three more chains added for cpu debug access.	simons	7628d 03h	/dbg_interface/tags/rev_23
61	Lapsus fixed.	simons	7656d 03h	/dbg_interface/tags/rev_23
59	Reset value for riscsel register set to 1.	simons	7656d 03h	/dbg_interface/tags/rev_23
57	Multiple cpu support added.	simons	7656d 05h	/dbg_interface/tags/rev_23
56	Revision 1.6. Trst changed to active high !!!. In order to be compliant with the standard, reset needs to be negated on the upper layer.	mohor	7923d 01h	/dbg_interface/tags/rev_23

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[/] [dbg_interface/] [tags/] [rev_23] - Rev 95

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