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[/] [dbg_interface/] [tags/] [sdram_test_working/] [rtl/] - Rev 32

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Rev	Log message	Author	Age	Path
32	Stupid bug that was entered by previous update fixed.	mohor	8188d 16h	/dbg_interface/tags/sdram_test_working/rtl
31	trst synchronization is not needed and was removed.	mohor	8188d 17h	/dbg_interface/tags/sdram_test_working/rtl
30	IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in not filled-in. Tested in hw.	mohor	8199d 22h	/dbg_interface/tags/sdram_test_working/rtl
28	TDO and TDO Enable signal are separated into two signals.	mohor	8235d 19h	/dbg_interface/tags/sdram_test_working/rtl
27	Warnings from synthesys tools fixed.	mohor	8249d 20h	/dbg_interface/tags/sdram_test_working/rtl
26	Warnings from synthesys tools fixed.	mohor	8249d 20h	/dbg_interface/tags/sdram_test_working/rtl
25	trst signal is synchronized to wb_clk_i.	mohor	8250d 16h	/dbg_interface/tags/sdram_test_working/rtl
23	Trace disabled by default.	mohor	8257d 20h	/dbg_interface/tags/sdram_test_working/rtl
22	Register length fixed.	mohor	8257d 20h	/dbg_interface/tags/sdram_test_working/rtl
21	CRC is returned when chain selection data is transmitted.	mohor	8258d 16h	/dbg_interface/tags/sdram_test_working/rtl
20	Crc generation is different for read or write commands. Small synthesys fixes.	mohor	8259d 19h	/dbg_interface/tags/sdram_test_working/rtl
19	Wishbone data latched on wb_clk_i instead of risc_clk.	mohor	8271d 20h	/dbg_interface/tags/sdram_test_working/rtl
18	Reset signals are not combined any more.	mohor	8274d 05h	/dbg_interface/tags/sdram_test_working/rtl
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8297d 18h	/dbg_interface/tags/sdram_test_working/rtl
15	bs_chain_o added.	mohor	8299d 19h	/dbg_interface/tags/sdram_test_working/rtl
13	Signal names changed to lowercase.	mohor	8300d 20h	/dbg_interface/tags/sdram_test_working/rtl
12	Wishbone interface added, few fixes for better performance, hooks for boundary scan testing added.	mohor	8301d 20h	/dbg_interface/tags/sdram_test_working/rtl
11	Changes connected to the OpenRISC access (SPR read, SPR write).	mohor	8322d 16h	/dbg_interface/tags/sdram_test_working/rtl
9	Working version. Few bugs fixed, comments added.	mohor	8326d 20h	/dbg_interface/tags/sdram_test_working/rtl
8	Asynchronous set/reset not used in trace any more.	mohor	8327d 18h	/dbg_interface/tags/sdram_test_working/rtl
5	Trace fixed. Some registers changed, trace simplified.	mohor	8328d 16h	/dbg_interface/tags/sdram_test_working/rtl
2	Initial official release.	mohor	8333d 16h	/dbg_interface/tags/sdram_test_working/rtl

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[/] [dbg_interface/] [tags/] [sdram_test_working/] [rtl/] - Rev 32

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