URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [bench/] [verilog] - Rev 281

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
281	Tests test_mac_full_duplex_receive 4-7 fixed to proper BD.	mohor	7818d 20h	/ethmac/branches/unneback/bench/verilog
279	Underrun test fixed. Many other tests fixed.	mohor	7819d 22h	/ethmac/branches/unneback/bench/verilog
274	Backup version. Not fully working.	tadejm	7827d 16h	/ethmac/branches/unneback/bench/verilog
267	Full duplex control frames tested.	mohor	7883d 20h	/ethmac/branches/unneback/bench/verilog
266	Flow control test almost finished.	mohor	7888d 19h	/ethmac/branches/unneback/bench/verilog
263	test_mac_full_duplex_flow_control tests pretty much finished. TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 10Mbps ) finished. TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED OFF AT ONE RX BD ( 10Mbps ) finished.	mohor	7889d 10h	/ethmac/branches/unneback/bench/verilog
260	test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame finished.	mohor	7889d 22h	/ethmac/branches/unneback/bench/verilog
254	Temp version.	mohor	7891d 16h	/ethmac/branches/unneback/bench/verilog
252	Just some updates.	tadejm	7891d 18h	/ethmac/branches/unneback/bench/verilog
243	Late collision is not reported any more.	tadejm	7896d 23h	/ethmac/branches/unneback/bench/verilog
227	Changed BIST scan signals.	tadejm	7923d 19h	/ethmac/branches/unneback/bench/verilog
223	Some code changed due to bug fixes.	tadejm	7923d 22h	/ethmac/branches/unneback/bench/verilog
216	Bist signals added.	mohor	7930d 23h	/ethmac/branches/unneback/bench/verilog
209	Just back-up; not completed testbench and some testcases are not wotking properly yet.	tadejm	7932d 23h	/ethmac/branches/unneback/bench/verilog
194	Full duplex tests modified and testbench bug repaired.	tadej	7951d 22h	/ethmac/branches/unneback/bench/verilog
192	Some additional reports added	tadej	7953d 18h	/ethmac/branches/unneback/bench/verilog
191	Bug repaired in eth_phy device	tadej	7953d 18h	/ethmac/branches/unneback/bench/verilog
189	Simple testbench that includes eth_cop, eth_host and eth_memory modules. This testbench is used for testing the whole environment. Use tb_ethernet testbench for testing just the ethernet MAC core (many tests).	mohor	7953d 19h	/ethmac/branches/unneback/bench/verilog
188	PHY changed.	tadej	7954d 16h	/ethmac/branches/unneback/bench/verilog
182	Full duplex test improved.	tadej	7955d 18h	/ethmac/branches/unneback/bench/verilog
181	MIIM test look better.	mohor	7955d 21h	/ethmac/branches/unneback/bench/verilog
180	Bench outputs data to display every 128 bytes.	mohor	7958d 17h	/ethmac/branches/unneback/bench/verilog
179	Beautiful tests merget together	mohor	7958d 17h	/ethmac/branches/unneback/bench/verilog
178	Rearanged testcases	mohor	7958d 17h	/ethmac/branches/unneback/bench/verilog
177	Bug in MIIM fixed.	mohor	7958d 21h	/ethmac/branches/unneback/bench/verilog
170	Headers changed.	mohor	7959d 00h	/ethmac/branches/unneback/bench/verilog
169	New testbench. Thanks to Tadej M - "The Spammer".	mohor	7959d 00h	/ethmac/branches/unneback/bench/verilog
158	Typo fixed.	mohor	7963d 20h	/ethmac/branches/unneback/bench/verilog
157	This testbench will soon be obsolete. Please use tb_ethernet.v	mohor	7966d 01h	/ethmac/branches/unneback/bench/verilog
156	Valid testbench.	mohor	7966d 01h	/ethmac/branches/unneback/bench/verilog

Browse

Tools

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [bench/] [verilog] - Rev 281

Filtering Options