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[/] [ethmac/] [tags/] [asyst_2/] - Rev 240

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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7876d 15h /ethmac/tags/asyst_2
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7876d 15h /ethmac/tags/asyst_2
238 Defines fixed to use generic RAM by default. mohor 7888d 19h /ethmac/tags/asyst_2
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7891d 00h /ethmac/tags/asyst_2
235 rev 4. mohor 7891d 15h /ethmac/tags/asyst_2
234 Figure list assed to the revision 3. mohor 7891d 23h /ethmac/tags/asyst_2
233 Revision 0.3 released. Some figures added. mohor 7891d 23h /ethmac/tags/asyst_2
232 fpga define added. mohor 7896d 18h /ethmac/tags/asyst_2
231 Description of Core Modules added (figure). mohor 7898d 20h /ethmac/tags/asyst_2
229 case changed to casex. mohor 7902d 16h /ethmac/tags/asyst_2
227 Changed BIST scan signals. tadejm 7902d 20h /ethmac/tags/asyst_2
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7902d 22h /ethmac/tags/asyst_2
225 Some minor changes. tadejm 7902d 22h /ethmac/tags/asyst_2
224 Signals for a wave window in Modelsim. tadejm 7902d 23h /ethmac/tags/asyst_2
223 Some code changed due to bug fixes. tadejm 7902d 23h /ethmac/tags/asyst_2
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7906d 21h /ethmac/tags/asyst_2
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7909d 22h /ethmac/tags/asyst_2
218 Typo error fixed. (When using Bist) mohor 7910d 00h /ethmac/tags/asyst_2
217 Bist supported. mohor 7910d 00h /ethmac/tags/asyst_2
216 Bist signals added. mohor 7910d 00h /ethmac/tags/asyst_2
215 Bist supported. mohor 7910d 01h /ethmac/tags/asyst_2
214 Signals for WISHBONE B3 compliant interface added. mohor 7910d 20h /ethmac/tags/asyst_2
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7910d 21h /ethmac/tags/asyst_2
212 Minor $display change. mohor 7910d 21h /ethmac/tags/asyst_2
211 Bist added. mohor 7910d 21h /ethmac/tags/asyst_2
210 BIST added. mohor 7910d 21h /ethmac/tags/asyst_2
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7912d 00h /ethmac/tags/asyst_2
208 Virtual Silicon RAMs moved to lib directory tadej 7927d 18h /ethmac/tags/asyst_2
207 Virtual Silicon RAM support fixed tadej 7927d 18h /ethmac/tags/asyst_2
206 Virtual Silicon RAM added to the simulation. mohor 7927d 18h /ethmac/tags/asyst_2

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