OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_1] - Rev 90

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
90 casex changed with case, fifo reset changed. mohor 8126d 06h /ethmac/tags/rel_1
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8130d 04h /ethmac/tags/rel_1
88 rx_fifo was not always cleared ok. Fixed. mohor 8136d 03h /ethmac/tags/rel_1
87 Status was not latched correctly sometimes. Fixed. mohor 8136d 05h /ethmac/tags/rel_1
86 Big Endian problem when sending frames fixed. mohor 8137d 12h /ethmac/tags/rel_1
85 Log info was missing. mohor 8142d 22h /ethmac/tags/rel_1
84 LinkFail signal was not latching appropriate bit. mohor 8142d 22h /ethmac/tags/rel_1
83 MAC address recognition was not correct (bytes swaped). mohor 8142d 22h /ethmac/tags/rel_1
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8143d 00h /ethmac/tags/rel_1
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8143d 00h /ethmac/tags/rel_1
80 Small fixes for external/internal DMA missmatches. mohor 8147d 02h /ethmac/tags/rel_1
79 RetryCntLatched was unused and removed from design mohor 8147d 03h /ethmac/tags/rel_1
78 WB_SEL_I was unused and removed from design mohor 8147d 03h /ethmac/tags/rel_1
77 Interrupts changed mohor 8147d 03h /ethmac/tags/rel_1
76 Interrupts changed in the top file mohor 8147d 03h /ethmac/tags/rel_1
75 r_Bro is used for accepting/denying frames mohor 8147d 03h /ethmac/tags/rel_1
74 Reset values are passed to registers through parameters mohor 8147d 03h /ethmac/tags/rel_1
73 Number of interrupts changed mohor 8147d 03h /ethmac/tags/rel_1
72 Retry is not activated when a Tx Underrun occured mohor 8151d 06h /ethmac/tags/rel_1
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8155d 08h /ethmac/tags/rel_1
70 Small fixes. mohor 8155d 08h /ethmac/tags/rel_1
69 Define missmatch fixed. mohor 8156d 06h /ethmac/tags/rel_1
68 Registered trimmed. Unused registers removed. mohor 8157d 05h /ethmac/tags/rel_1
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8157d 06h /ethmac/tags/rel_1
66 Testbench fixed, code simplified, unused signals removed. mohor 8157d 12h /ethmac/tags/rel_1
65 Testbench fixed, code simplified, unused signals removed. mohor 8157d 12h /ethmac/tags/rel_1
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8158d 02h /ethmac/tags/rel_1
63 RxAbort is connected differently. mohor 8158d 05h /ethmac/tags/rel_1
62 RxAbort is an output. No need to have is declared as wire. mohor 8158d 05h /ethmac/tags/rel_1
61 RxStartFrm cleared when abort or retry comes. mohor 8158d 07h /ethmac/tags/rel_1

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.