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[/] [ethmac/] [tags/] [rel_10] - Rev 188

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Rev Log message Author Age Path
188 PHY changed. tadej 7998d 10h /ethmac/tags/rel_10
187 _info file added. mohor 7998d 11h /ethmac/tags/rel_10
186 Macro for testbench (DO file). mohor 7998d 11h /ethmac/tags/rel_10
185 Directory keeper. mohor 7998d 11h /ethmac/tags/rel_10
184 Modelsim simulation environment should be ready now. mohor 7998d 12h /ethmac/tags/rel_10
183 Modelsim environment added. mohor 7998d 12h /ethmac/tags/rel_10
182 Full duplex test improved. tadej 7999d 12h /ethmac/tags/rel_10
181 MIIM test look better. mohor 7999d 15h /ethmac/tags/rel_10
180 Bench outputs data to display every 128 bytes. mohor 8002d 11h /ethmac/tags/rel_10
179 Beautiful tests merget together mohor 8002d 12h /ethmac/tags/rel_10
178 Rearanged testcases mohor 8002d 12h /ethmac/tags/rel_10
177 Bug in MIIM fixed. mohor 8002d 16h /ethmac/tags/rel_10
176 lists changed to new directory structure mohor 8002d 17h /ethmac/tags/rel_10
175 Script fixed to new dir structure mohor 8002d 17h /ethmac/tags/rel_10
174 Directory keeper mohor 8002d 17h /ethmac/tags/rel_10
173 Keeps the directory mohor 8002d 17h /ethmac/tags/rel_10
172 NCSIM simulation environment added to cvs mohor 8002d 17h /ethmac/tags/rel_10
171 NCSIM simulation environment added. mohor 8002d 17h /ethmac/tags/rel_10
170 Headers changed. mohor 8002d 18h /ethmac/tags/rel_10
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 8002d 18h /ethmac/tags/rel_10
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 8003d 16h /ethmac/tags/rel_10
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 8004d 16h /ethmac/tags/rel_10
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 8005d 17h /ethmac/tags/rel_10
165 HASH improvement needed. mohor 8005d 20h /ethmac/tags/rel_10
164 Ethernet debug registers removed. mohor 8005d 20h /ethmac/tags/rel_10
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 8006d 12h /ethmac/tags/rel_10
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 8006d 12h /ethmac/tags/rel_10
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 8006d 17h /ethmac/tags/rel_10
160 error acknowledge cycle termination added to display. mohor 8006d 17h /ethmac/tags/rel_10
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 8007d 14h /ethmac/tags/rel_10

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