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Rev Log message Author Age Path
118 ShiftEnded synchronization changed. mohor 8009d 01h /ethmac/tags/rel_14
117 Clock mrx_clk set to 2.5 MHz. mohor 8009d 11h /ethmac/tags/rel_14
116 Testing environment also includes traffic cop, memory interface and host
interface.		 mohor 8009d 11h /ethmac/tags/rel_14
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8010d 09h /ethmac/tags/rel_14
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8011d 07h /ethmac/tags/rel_14
113 RxPointer bug fixed. mohor 8017d 23h /ethmac/tags/rel_14
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8018d 12h /ethmac/tags/rel_14
111 Master state machine had a bug when switching from master write to
master read.		 mohor 8019d 02h /ethmac/tags/rel_14
110 m_wb_cyc_o signal released after every single transfer. mohor 8019d 05h /ethmac/tags/rel_14
109 Comment removed. mohor 8019d 05h /ethmac/tags/rel_14
108 Testbench supports unaligned accesses. mohor 8086d 15h /ethmac/tags/rel_14
107 TX_BUF_BASE changed. mohor 8086d 15h /ethmac/tags/rel_14
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8086d 15h /ethmac/tags/rel_14
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8095d 17h /ethmac/tags/rel_14
104 FCS should not be included in NibbleMinFl. mohor 8097d 11h /ethmac/tags/rel_14
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v		 mohor 8097d 11h /ethmac/tags/rel_14
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.		 mohor 8097d 11h /ethmac/tags/rel_14
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8097d 12h /ethmac/tags/rel_14
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8097d 12h /ethmac/tags/rel_14
99 Document revised. mohor 8104d 10h /ethmac/tags/rel_14
98 Document revised. mohor 8104d 11h /ethmac/tags/rel_14
97 Small typo fixed. lampret 8121d 09h /ethmac/tags/rel_14
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8125d 09h /ethmac/tags/rel_14
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8125d 12h /ethmac/tags/rel_14
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.		 mohor 8125d 12h /ethmac/tags/rel_14
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8130d 10h /ethmac/tags/rel_14
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8131d 13h /ethmac/tags/rel_14
91 Comments in Slovene language removed. mohor 8131d 13h /ethmac/tags/rel_14
90 casex changed with case, fifo reset changed. mohor 8131d 13h /ethmac/tags/rel_14
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8135d 10h /ethmac/tags/rel_14

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