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190 Several information added to the file. mohor 7928d 12h /ethmac/tags/rel_18
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).		 mohor 7928d 12h /ethmac/tags/rel_18
188 PHY changed. tadej 7929d 09h /ethmac/tags/rel_18
187 _info file added. mohor 7929d 09h /ethmac/tags/rel_18
186 Macro for testbench (DO file). mohor 7929d 10h /ethmac/tags/rel_18
185 Directory keeper. mohor 7929d 10h /ethmac/tags/rel_18
184 Modelsim simulation environment should be ready now. mohor 7929d 10h /ethmac/tags/rel_18
183 Modelsim environment added. mohor 7929d 10h /ethmac/tags/rel_18
182 Full duplex test improved. tadej 7930d 11h /ethmac/tags/rel_18
181 MIIM test look better. mohor 7930d 14h /ethmac/tags/rel_18
180 Bench outputs data to display every 128 bytes. mohor 7933d 10h /ethmac/tags/rel_18
179 Beautiful tests merget together mohor 7933d 10h /ethmac/tags/rel_18
178 Rearanged testcases mohor 7933d 10h /ethmac/tags/rel_18
177 Bug in MIIM fixed. mohor 7933d 14h /ethmac/tags/rel_18
176 lists changed to new directory structure mohor 7933d 16h /ethmac/tags/rel_18
175 Script fixed to new dir structure mohor 7933d 16h /ethmac/tags/rel_18
174 Directory keeper mohor 7933d 16h /ethmac/tags/rel_18
173 Keeps the directory mohor 7933d 16h /ethmac/tags/rel_18
172 NCSIM simulation environment added to cvs mohor 7933d 16h /ethmac/tags/rel_18
171 NCSIM simulation environment added. mohor 7933d 16h /ethmac/tags/rel_18
170 Headers changed. mohor 7933d 16h /ethmac/tags/rel_18
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7933d 17h /ethmac/tags/rel_18
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7934d 14h /ethmac/tags/rel_18
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7935d 15h /ethmac/tags/rel_18
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 7936d 15h /ethmac/tags/rel_18
165 HASH improvement needed. mohor 7936d 18h /ethmac/tags/rel_18
164 Ethernet debug registers removed. mohor 7936d 18h /ethmac/tags/rel_18
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 7937d 10h /ethmac/tags/rel_18
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7937d 10h /ethmac/tags/rel_18
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7937d 16h /ethmac/tags/rel_18

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