OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_19/] - Rev 121

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 8004d 08h /ethmac/tags/rel_19
120 Unused files removed. mohor 8004d 09h /ethmac/tags/rel_19
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 8004d 09h /ethmac/tags/rel_19
118 ShiftEnded synchronization changed. mohor 8008d 00h /ethmac/tags/rel_19
117 Clock mrx_clk set to 2.5 MHz. mohor 8008d 10h /ethmac/tags/rel_19
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 8008d 11h /ethmac/tags/rel_19
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8009d 08h /ethmac/tags/rel_19
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8010d 06h /ethmac/tags/rel_19
113 RxPointer bug fixed. mohor 8016d 22h /ethmac/tags/rel_19
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8017d 11h /ethmac/tags/rel_19
111 Master state machine had a bug when switching from master write to
master read.
mohor 8018d 01h /ethmac/tags/rel_19
110 m_wb_cyc_o signal released after every single transfer. mohor 8018d 04h /ethmac/tags/rel_19
109 Comment removed. mohor 8018d 04h /ethmac/tags/rel_19
108 Testbench supports unaligned accesses. mohor 8085d 14h /ethmac/tags/rel_19
107 TX_BUF_BASE changed. mohor 8085d 14h /ethmac/tags/rel_19
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8085d 14h /ethmac/tags/rel_19
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 8094d 16h /ethmac/tags/rel_19
104 FCS should not be included in NibbleMinFl. mohor 8096d 10h /ethmac/tags/rel_19
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 8096d 10h /ethmac/tags/rel_19
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 8096d 10h /ethmac/tags/rel_19
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8096d 11h /ethmac/tags/rel_19
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 8096d 11h /ethmac/tags/rel_19
99 Document revised. mohor 8103d 09h /ethmac/tags/rel_19
98 Document revised. mohor 8103d 10h /ethmac/tags/rel_19
97 Small typo fixed. lampret 8120d 08h /ethmac/tags/rel_19
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 8124d 08h /ethmac/tags/rel_19
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8124d 11h /ethmac/tags/rel_19
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 8124d 11h /ethmac/tags/rel_19
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8129d 09h /ethmac/tags/rel_19
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8130d 12h /ethmac/tags/rel_19

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.