OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_2/] - Rev 92

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8120d 00h /ethmac/tags/rel_2
91 Comments in Slovene language removed. mohor 8120d 00h /ethmac/tags/rel_2
90 casex changed with case, fifo reset changed. mohor 8120d 00h /ethmac/tags/rel_2
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8123d 22h /ethmac/tags/rel_2
88 rx_fifo was not always cleared ok. Fixed. mohor 8129d 21h /ethmac/tags/rel_2
87 Status was not latched correctly sometimes. Fixed. mohor 8129d 23h /ethmac/tags/rel_2
86 Big Endian problem when sending frames fixed. mohor 8131d 06h /ethmac/tags/rel_2
85 Log info was missing. mohor 8136d 16h /ethmac/tags/rel_2
84 LinkFail signal was not latching appropriate bit. mohor 8136d 16h /ethmac/tags/rel_2
83 MAC address recognition was not correct (bytes swaped). mohor 8136d 16h /ethmac/tags/rel_2
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8136d 18h /ethmac/tags/rel_2
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8136d 18h /ethmac/tags/rel_2
80 Small fixes for external/internal DMA missmatches. mohor 8140d 20h /ethmac/tags/rel_2
79 RetryCntLatched was unused and removed from design mohor 8140d 20h /ethmac/tags/rel_2
78 WB_SEL_I was unused and removed from design mohor 8140d 20h /ethmac/tags/rel_2
77 Interrupts changed mohor 8140d 20h /ethmac/tags/rel_2
76 Interrupts changed in the top file mohor 8140d 20h /ethmac/tags/rel_2
75 r_Bro is used for accepting/denying frames mohor 8140d 20h /ethmac/tags/rel_2
74 Reset values are passed to registers through parameters mohor 8140d 20h /ethmac/tags/rel_2
73 Number of interrupts changed mohor 8140d 21h /ethmac/tags/rel_2
72 Retry is not activated when a Tx Underrun occured mohor 8145d 00h /ethmac/tags/rel_2
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8149d 01h /ethmac/tags/rel_2
70 Small fixes. mohor 8149d 02h /ethmac/tags/rel_2
69 Define missmatch fixed. mohor 8149d 23h /ethmac/tags/rel_2
68 Registered trimmed. Unused registers removed. mohor 8150d 23h /ethmac/tags/rel_2
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8151d 00h /ethmac/tags/rel_2
66 Testbench fixed, code simplified, unused signals removed. mohor 8151d 05h /ethmac/tags/rel_2
65 Testbench fixed, code simplified, unused signals removed. mohor 8151d 05h /ethmac/tags/rel_2
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8151d 20h /ethmac/tags/rel_2
63 RxAbort is connected differently. mohor 8151d 23h /ethmac/tags/rel_2

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.