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[/] [ethmac/] [tags/] [rel_22/] - Rev 188

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Rev Log message Author Age Path
188 PHY changed. tadej 7994d 01h /ethmac/tags/rel_22
187 _info file added. mohor 7994d 02h /ethmac/tags/rel_22
186 Macro for testbench (DO file). mohor 7994d 02h /ethmac/tags/rel_22
185 Directory keeper. mohor 7994d 02h /ethmac/tags/rel_22
184 Modelsim simulation environment should be ready now. mohor 7994d 02h /ethmac/tags/rel_22
183 Modelsim environment added. mohor 7994d 03h /ethmac/tags/rel_22
182 Full duplex test improved. tadej 7995d 03h /ethmac/tags/rel_22
181 MIIM test look better. mohor 7995d 06h /ethmac/tags/rel_22
180 Bench outputs data to display every 128 bytes. mohor 7998d 02h /ethmac/tags/rel_22
179 Beautiful tests merget together mohor 7998d 03h /ethmac/tags/rel_22
178 Rearanged testcases mohor 7998d 03h /ethmac/tags/rel_22
177 Bug in MIIM fixed. mohor 7998d 06h /ethmac/tags/rel_22
176 lists changed to new directory structure mohor 7998d 08h /ethmac/tags/rel_22
175 Script fixed to new dir structure mohor 7998d 08h /ethmac/tags/rel_22
174 Directory keeper mohor 7998d 08h /ethmac/tags/rel_22
173 Keeps the directory mohor 7998d 08h /ethmac/tags/rel_22
172 NCSIM simulation environment added to cvs mohor 7998d 08h /ethmac/tags/rel_22
171 NCSIM simulation environment added. mohor 7998d 08h /ethmac/tags/rel_22
170 Headers changed. mohor 7998d 09h /ethmac/tags/rel_22
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7998d 09h /ethmac/tags/rel_22
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7999d 06h /ethmac/tags/rel_22
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 8000d 07h /ethmac/tags/rel_22
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 8001d 07h /ethmac/tags/rel_22
165 HASH improvement needed. mohor 8001d 11h /ethmac/tags/rel_22
164 Ethernet debug registers removed. mohor 8001d 11h /ethmac/tags/rel_22
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 8002d 03h /ethmac/tags/rel_22
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 8002d 03h /ethmac/tags/rel_22
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 8002d 08h /ethmac/tags/rel_22
160 error acknowledge cycle termination added to display. mohor 8002d 08h /ethmac/tags/rel_22
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 8003d 05h /ethmac/tags/rel_22

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