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Rev Log message Author Age Path
227 Changed BIST scan signals. tadejm 7922d 01h /ethmac/tags/rel_22
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7922d 02h /ethmac/tags/rel_22
225 Some minor changes. tadejm 7922d 03h /ethmac/tags/rel_22
224 Signals for a wave window in Modelsim. tadejm 7922d 04h /ethmac/tags/rel_22
223 Some code changed due to bug fixes. tadejm 7922d 04h /ethmac/tags/rel_22
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7926d 02h /ethmac/tags/rel_22
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7929d 03h /ethmac/tags/rel_22
218 Typo error fixed. (When using Bist) mohor 7929d 05h /ethmac/tags/rel_22
217 Bist supported. mohor 7929d 05h /ethmac/tags/rel_22
216 Bist signals added. mohor 7929d 05h /ethmac/tags/rel_22
215 Bist supported. mohor 7929d 05h /ethmac/tags/rel_22
214 Signals for WISHBONE B3 compliant interface added. mohor 7930d 01h /ethmac/tags/rel_22
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7930d 01h /ethmac/tags/rel_22
212 Minor $display change. mohor 7930d 01h /ethmac/tags/rel_22
211 Bist added. mohor 7930d 02h /ethmac/tags/rel_22
210 BIST added. mohor 7930d 02h /ethmac/tags/rel_22
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7931d 05h /ethmac/tags/rel_22
208 Virtual Silicon RAMs moved to lib directory tadej 7946d 23h /ethmac/tags/rel_22
207 Virtual Silicon RAM support fixed tadej 7946d 23h /ethmac/tags/rel_22
206 Virtual Silicon RAM added to the simulation. mohor 7946d 23h /ethmac/tags/rel_22
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7947d 00h /ethmac/tags/rel_22
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7947d 00h /ethmac/tags/rel_22
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.		 mohor 7947d 00h /ethmac/tags/rel_22
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.		 mohor 7950d 01h /ethmac/tags/rel_22
201 Core size added to the document. mohor 7950d 02h /ethmac/tags/rel_22
200 File with lower case checked in instead. mohor 7950d 02h /ethmac/tags/rel_22
199 Datasheet name changed to lower case name. mohor 7950d 02h /ethmac/tags/rel_22
198 Removed file. File with name in lower case will be added instead. mohor 7950d 02h /ethmac/tags/rel_22
197 Ethernet Data Sheet. mohor 7950d 02h /ethmac/tags/rel_22
196 Ethernet product brief. mohor 7950d 03h /ethmac/tags/rel_22

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